Today's computation applications are becoming extremely data intensive; examples can be found in fields such as healthcare, social media, large scientific/engineering experiments, and security. As the speed of information growth exceeds Moore's Law, since the beginning of this century, excessive data is posing major challenges and a new scientific paradigm is born: data-intensive scientific discovery, also known as Big Data problems.
A large number of fields and sectors, ranging from economics and business activities to public administration, from national security to many scientific research areas, involve data-intensive applications, hence, dealing with Big Data problems. Big Data is extremely valuable to generate productivity in businesses and evolutionary breakthroughs in scientific disciplines.
The primary goal of Big Data applications is to analyze and increase the understanding of both data and processes in order to extract the highly useful information hidden in a huge volume of data, and therefore, it comes with many challenges, such as data capture, data storage, data analysis, and data visualization.
Performing data analysis within economically affordable time and energy is the pillar to solve big data problems.
Big Data analysis can be used to increase e.g., the productivity. Storing and analyzing such data is posing major challenges as the data volume already surpasses the capability of today's computers that suffer from e.g., communication and memory-access bottlenecks due to limited bandwidth. For instance, a (network) transfer of one petabyte of data at a rate of 1000 MB/second will take about 12.5 days.
Prior art computing systems, developed since the introduction of stored program computers by John von Neumann in the forties of the previous century, can be classified based on the location of the so-called “working set” (loosely defined as the collection of information referenced by a program during its execution) into typically four classes. In the early computers (typically before the 1980s), the working set was contained in main memory. Due to the gap between the core (CPU) speed and the memory, caches were introduced to reduce the gap and increase the overall performance, where the caches have become the location of the working set.
Still, at present, computing systems for data-intensive applications are still based on Von Neumann (VN) architectures and still rely on many parallel (mini-)cores with a shared SRAM cache (parallel CPUs, GPUs, SIMD-VLIWs, vector processors). Clusters of cores can be replicated many times, each having their own L1 cache, but it is far from realistic to assume a distributed reasonable sized L1 cache in every mini-core; too much area and leakage power overhead is incurred in that case. Such solutions suffer from major limitations such as a decreased performance acceleration per core, increased power consumption, and limited system scalability. These issues are mainly caused by the processor-memory bottleneck of the VN architecture.
Memory size and memory access do not only kill the performance, but also severely impact energy/power consumption in Big Data applications.
As current data-intensive applications require huge data transfers back and forth between processors and memories through load/store instructions, the maximal performance cannot be extracted, as the processors will have many idle moments while waiting for data. Computation, which is the main activity of a system, by far consumes less energy and chip area, and has lower execution time compared to communication and memory access (e.g., an L1 cache), especially for data intensive applications. The energy consumption of the cache accesses and communication makes up easily 70% to 90%. For example, executing a multiply instruction on a simple in-order core in 45 nm technology consumes about 70 pJ (pico Joule), whereas the actual operation itself consumes less than 4 pJ. The overhead is due to instruction fetching and decoding and other control.
In addition, CMOS technology, which is used to implement today's computation architectures, contributes to such consumption due to high leakage currents, as the technology is reaching the inherent physical limits due to downscaling.
Furthermore, CMOS technology is facing other challenges such as high static power consumption, reduced performance gain, reduced reliability, complex manufacturing process leading to low yield and complex testing process, and extremely costly lithography masks.
In conclusion, today's CMOS based architectures are not able to provide the computation capability needed for data-intensive applications. New architectures based on new technologies are urgently required.
It is an object of the present invention to overcome or mitigate one or more disadvantages from the prior art.